Hi everybody, before starting i would like to say that i have started this blog to share my experiences in VLSI designing which can be helpful to the students and engineers who wants to enter into one of the evergreen and royal field of electronics.
Most of the students of Electronics Engineering are exposed to Integrated Circuits (IC's) at a very basic level, involving SSI (small scale integration) circuits like logic gates or MSI (medium scale integration) circuits like multiplexers, parity encoders etc. But there is a lot bigger world out there involving miniaturization at levels so great, that a micrometer and a microsecond are literally considered huge! This is the world of VLSI - Very Large Scale Integration. The article aims at trying to introduce Electronics Engineering students to the possibilities and the work involved in this field.
A typical digital design flow is as follows:
Specification =>Architecture =>RTL Coding =>RTL Verification =>Synthesis =>Backend =>Tape Out to Foundry to get end product….a wafer with repeated number of identical Ics.
All modern digital designs start with a designer writing a hardware description of the IC (using HDL or Hardware Description Language) in Verilog/VHDL. A Verilog or VHDL program essentially describes the hardware (logic gates, Flip-Flops, counters etc) and the interconnect of the circuit blocks and the functionality. Various CAD tools are available to synthesize a circuit based on the HDL. The most widely used synthesis tools come from two CAD companies, Synposys and Cadence.
Without going into details, we can say that the VHDL can be called as the "C" of the VLSI industry. VHDL stands for "VHSIC Hardware Definition Language", where VHSIC stands for "Very High Speed Integrated Circuit". This language is used to design the circuits at a high-level, in two ways. It can either be a behavioral description, which describes what the circuit is supposed to do, or a structural description, which describes what the circuit is made of. There are other languages for describing circuits, such as Verilog, which work in a similar fashion.
Both forms of description are then used to generate a very low-level description that actually spells out how all this is to be fabricated on the silicon chips. This will result in the manufacture of the intended IC.
A typical analog design flow is as follows:
In case of analog design, the flow changes somewhat.
=>Specifications=> Architecture =>Circuit Design =>SPICE Simulation =>Layout =>Parametric Extraction / Back Annotation =>Final Design =>Tape Out to foundry.
While digital design is highly automated now, very small portion of analog design can be automated. There is a hardware description language called AHDL but is not widely used as it does not accurately give us the behavioral model of the circuit because of the complexity of the effects of parasitic on the analog behavior of the circuit. Many analog chips are what are termed as “flat” or non-hierarchical designs. This is true for small transistor count chips such as an operational amplifier, or a filter or a power management chip. For more complex analog chips such as data converters, the design is done at a transistor level, building up to a cell level, then a block level and then integrated at a chip level. Not many CAD tools are available for analog design even today and thus analog design remains a difficult art. SPICE remains the most useful simulation tool for analog as well as digital design.
From above discussion n from my personal experience i feel that digital design is the most important aspect of the VLSI design flow. Think if your design has some bug...!! the whole process then is costing billions of $. So it's very essential to take care start from the initial phase of designing.
Here during our discussion further we will go through several important concepts of digital dsigning and also see some standard designs.
